- Special Issue
- Co-Packaged Optics
- 4 Article (s)
Reviews
Thermal management in copackaged optics: from device assembly to system operation|Editors' Pick
Zhonghua Yang, Guopeng He, Yufeng Li, Yu Sun, Wenbo Luo, and Wanli Zhang
The rapid surge in global data traffic, driven by artificial intelligence and hyperscale data centers, has established copackaged optics (CPO) as a pivotal technology for next-generation high-bandwidth and low-power interconnects. By integrating optical engines directly with application-specific integrated circuits (ASICs) on a single substrate, CPO significantly reduces electrical link lengths and power consumption. However, the extreme power density of ASICs, together with the temperature sensitivity of photonic components, makes thermal management a critical bottleneck for CPO performance and reliability. We provide a comprehensive review of thermal management in CPO, encompassing various aspects from device assembly to system operation. We systematically discuss the packaging strategies and thermal reliability of lasers and fiber arrays, address thermal design considerations at both chip and package levels, and evaluate advanced thermal interface materials alongside module-level cooling technologies. Finally, we provide perspectives on future optoelectronic co-design and the thermal challenges of next-generation optical interconnects. The rapid surge in global data traffic, driven by artificial intelligence and hyperscale data centers, has established copackaged optics (CPO) as a pivotal technology for next-generation high-bandwidth and low-power interconnects. By integrating optical engines directly with application-specific integrated circuits (ASICs) on a single substrate, CPO significantly reduces electrical link lengths and power consumption. However, the extreme power density of ASICs, together with the temperature sensitivity of photonic components, makes thermal management a critical bottleneck for CPO performance and reliability. We provide a comprehensive review of thermal management in CPO, encompassing various aspects from device assembly to system operation. We systematically discuss the packaging strategies and thermal reliability of lasers and fiber arrays, address thermal design considerations at both chip and package levels, and evaluate advanced thermal interface materials alongside module-level cooling technologies. Finally, we provide perspectives on future optoelectronic co-design and the thermal challenges of next-generation optical interconnects.
Advanced Photonics Nexus
- Publication Date: Mar. 19, 2026
- Vol. 5, Issue 3, 034001 (2026)
Review of glass substrates for co-packaged optics: fabrication and performance of integrated electro-optical structures|Editors' Pick
Xin Chen, Bohui Gao, Zhixin Sheng, Xiaomeng Wu, Huimin He, and Haiyun Xue
The development of artificial intelligence and high-performance computing has driven increasing demand for higher aggregate data throughput, single-channel transmission rates, and lower power consumption in data centers. Co-packaged optics (CPO) technology presents a promising solution to these challenges. Glass substrates, owing to their excellent electrical and optical properties, are a highly promising candidate for CPO platforms. This review focuses on glass substrates for large-scale integrated CPO applications. First, the materials of glass substrates are compared: alkali glass for high-performance ion-exchange (IOX) optical waveguides and alkali-free glass for reliable electrical packaging. Next, electrical interconnection processes—through-glass-via (TGV) and redistribution layer (RDL) fabrication—are detailed. TGV+RDL structures achieve bandwidths up to 110 GHz, with RDL line densities exceeding 500 lines / mm at 2 μm line/space. Standard 40 μm diameter TGVs provide densities of 100 to 2500 vias / mm2 at 20 to 130 μm pitch. Furthermore, we examine and compare several manufacturing processes for glass optical waveguides, which are critical for optical coupling in CPO. For optical coupling, various waveguide fabrication methods are analyzed, with IOX being the dominant technique, yielding propagation losses as low as 0.034 dB / cm. Finally, the applications, opportunities, and challenges for glass-based CPO are summarized. The development of artificial intelligence and high-performance computing has driven increasing demand for higher aggregate data throughput, single-channel transmission rates, and lower power consumption in data centers. Co-packaged optics (CPO) technology presents a promising solution to these challenges. Glass substrates, owing to their excellent electrical and optical properties, are a highly promising candidate for CPO platforms. This review focuses on glass substrates for large-scale integrated CPO applications. First, the materials of glass substrates are compared: alkali glass for high-performance ion-exchange (IOX) optical waveguides and alkali-free glass for reliable electrical packaging. Next, electrical interconnection processes—through-glass-via (TGV) and redistribution layer (RDL) fabrication—are detailed. TGV+RDL structures achieve bandwidths up to 110 GHz, with RDL line densities exceeding 500 lines / mm at 2 μm line/space. Standard 40 μm diameter TGVs provide densities of 100 to 2500 vias / mm2 at 20 to 130 μm pitch. Furthermore, we examine and compare several manufacturing processes for glass optical waveguides, which are critical for optical coupling in CPO. For optical coupling, various waveguide fabrication methods are analyzed, with IOX being the dominant technique, yielding propagation losses as low as 0.034 dB / cm. Finally, the applications, opportunities, and challenges for glass-based CPO are summarized.
Advanced Photonics Nexus
- Publication Date: Apr. 24, 2026
- Vol. 5, Issue 3, 034003 (2026)
Research Articles
Hybrid optoelectronic-integrated module design for quantum communication|Editors' Pick
Zhao-Yuan Chen, Yan-Fei Liu, Xiao-Sheng Si, Hao Zheng, Tian-Mei Li, Lei Feng, and Hǎo Zheng
Quantum key distribution (QKD) technology is progressively transitioning from experimental research to industrial development. The development of highly integrated and stable QKD modules has thus emerged as a new research direction. Current integrated QKD research primarily focuses on the integration of optical systems, with relatively few studies addressing optoelectronic co-integration. Due to the more stringent demands of QKD systems on driving signal amplitude, noise, and bandwidth, the driving electronics become more complex and power-intensive, making it difficult to achieve the level of optoelectronic integration seen in classical optical communication systems. We propose a hybrid optoelectronic integrating scheme for QKD modules based on chip-on-board technology, which co-packages the QKD-encoding photonic chip and its required electronic driver chips within a compact, centimeter-scale module. By optimizing the layout structure, incorporating thermal management, and implementing active temperature control, the module temperature can be stabilized within a set range. Simulation and experimental results demonstrate that the module has a total power consumption of 7.69 W and can maintain a stable temperature of 45°C for extended periods when the thermoelectric cooler is active. This effectively ensures the stable operation of the photonic chip and supports long-term QKD functionality, thereby providing technical support for advancing hybrid optoelectronic integrated QKD systems. Quantum key distribution (QKD) technology is progressively transitioning from experimental research to industrial development. The development of highly integrated and stable QKD modules has thus emerged as a new research direction. Current integrated QKD research primarily focuses on the integration of optical systems, with relatively few studies addressing optoelectronic co-integration. Due to the more stringent demands of QKD systems on driving signal amplitude, noise, and bandwidth, the driving electronics become more complex and power-intensive, making it difficult to achieve the level of optoelectronic integration seen in classical optical communication systems. We propose a hybrid optoelectronic integrating scheme for QKD modules based on chip-on-board technology, which co-packages the QKD-encoding photonic chip and its required electronic driver chips within a compact, centimeter-scale module. By optimizing the layout structure, incorporating thermal management, and implementing active temperature control, the module temperature can be stabilized within a set range. Simulation and experimental results demonstrate that the module has a total power consumption of 7.69 W and can maintain a stable temperature of 45°C for extended periods when the thermoelectric cooler is active. This effectively ensures the stable operation of the photonic chip and supports long-term QKD functionality, thereby providing technical support for advancing hybrid optoelectronic integrated QKD systems.
Advanced Photonics Nexus
- Publication Date: Jan. 24, 2026
- Vol. 5, Issue 3, 036001 (2026)
Silicon photonic microring-based eight-channel wavelength-division multiplexing transceiver for high-density optical interconnects|Editors' Pick
Shenlei Bao, Chao Cheng, Xianglin Bu, Houyou Lai, Xishan Yu, Jianjun Zhou, Jintao Xue, Wenfu Zhang, and Binhao Wang
We demonstrate a fully integrated eight-channel dense wavelength-division multiplexing silicon photonic transceiver supporting 200-Gbps per-channel PAM4 operation, enabling a total chip-to-chip data rate of 1.6 Tbps. The transmitter employs compact single-bus microring modulators, whereas the receiver adopts a polarization diversity architecture based on cascaded dual-ring filters and integrates a bidirectionally incident photodetector, maintaining stable performance under arbitrary input polarization. A unified multi-channel thermo-optic feedback architecture is implemented at both the transmitter and receiver, enabling cooperative link-level wavelength alignment without pre-calibration. This multi-channel parallel control scheme reduces wavelength locking time by ∼30 × while achieving fine wavelength-tracking accuracy of 2.74 pm with negligible thermal overhead. Comprehensive device- and system-level experiments validate the robustness and scalability of the proposed architecture. We uniquely address the critical bottlenecks of high polarization sensitivity and latency in wavelength alignment through a highly integrated silicon photonic architecture. By implementing polarization-splitting grating couplers and synchronized wavelength-locking schemes, we provide a transformative solution for high-density co-packaged optics. Our approach significantly reduces system footprint, enhances operational reliability, and improves power efficiency, thereby bridging the gap between laboratory demonstrations and practical 1.6-Tbps scale chip-to-chip interconnects. We demonstrate a fully integrated eight-channel dense wavelength-division multiplexing silicon photonic transceiver supporting 200-Gbps per-channel PAM4 operation, enabling a total chip-to-chip data rate of 1.6 Tbps. The transmitter employs compact single-bus microring modulators, whereas the receiver adopts a polarization diversity architecture based on cascaded dual-ring filters and integrates a bidirectionally incident photodetector, maintaining stable performance under arbitrary input polarization. A unified multi-channel thermo-optic feedback architecture is implemented at both the transmitter and receiver, enabling cooperative link-level wavelength alignment without pre-calibration. This multi-channel parallel control scheme reduces wavelength locking time by ∼30 × while achieving fine wavelength-tracking accuracy of 2.74 pm with negligible thermal overhead. Comprehensive device- and system-level experiments validate the robustness and scalability of the proposed architecture. We uniquely address the critical bottlenecks of high polarization sensitivity and latency in wavelength alignment through a highly integrated silicon photonic architecture. By implementing polarization-splitting grating couplers and synchronized wavelength-locking schemes, we provide a transformative solution for high-density co-packaged optics. Our approach significantly reduces system footprint, enhances operational reliability, and improves power efficiency, thereby bridging the gap between laboratory demonstrations and practical 1.6-Tbps scale chip-to-chip interconnects.
Advanced Photonics Nexus
- Publication Date: Mar. 10, 2026
- Vol. 5, Issue 3, 036002 (2026)
© Copyright 2018-2021 | Chinese Laser Press. All Rights Reserved 沪ICP备15018463号-20