As large-scale artificial intelligence and data-centric workloads continue to scale, the bandwidth, latency, and power constraints of electronic input/output (I/O) have become fundamental bottlenecks to next-generation high-performance computing.1^–3 Optical interconnects provide a compelling pathway to break this limitation, as they inherently support high bandwidth density with superior energy efficiency compared with electrical links.4^–9

Co-packaged optics (CPO) and optical I/O architectures are thus emerging as key enablers of chip-to-chip optical connectivity in future data-center systems.10^–14 Silicon photonics offers a scalable integration platform, yet multi-channel wavelength division multiplexing (WDM) transceivers remain challenged by wavelength misalignment,15^,16 polarization sensitivity,17^–19 and thermal fluctuations20^,21—particularly when microring-based devices are employed: (1) thermally induced resonance wavelength drift in silicon microring modulators (MRMs) and dual-ring filters, (2) performance fluctuations due to polarization sensitivity at the receiver, and (3) thermal crosstalk and channel instability in multi-channel WDM systems. Crucially, as per-lane data rates scale toward the 200-Gbps milestone, conventional silicon photonic designs face a formidable scalability bottleneck. Traditional single-directional photodetectors (PDs) encounter an intrinsic physical trade-off between responsivity and bandwidth, whereas standard uniform-doping MRMs suffer from limited modulation efficiency and resistive-capacitive (RC) bottlenecks.

To address these challenges, we present a multi-channel high-speed transceiver fully implemented on a standard silicon photonics (SiPh) platform. The system employs silicon-based MRMs and silicon-germanium (SiGe) PD as the transmitter and receiver components, respectively, forming a compact and complementary metal-oxide-semiconductor-compatible optical transceiver solution. On the transmitter side, co-design modeling and analysis of the MRM reveal the coupling relationships among junction capacitance, modulation efficiency, and electro-optical bandwidth, with strong agreement between theoretical models and experimental data. To overcome the MRM’s RC-limited bandwidth, we implement a four-level graded doping scheme that physically decouples resistive and capacitive constraints, thereby maximizing the mode-carrier overlap while preserving a high Q-factor. On the receiver side, we introduce a two-dimensional polarization-splitting grating coupler (PSGC) to minimize polarization-dependent loss (PDL) and enhance the overall system link stability. This is integrated with dual-ring filters and bidirectional PDs, which uniquely overcome the responsivity-bandwidth trade-off by enhancing the optical interaction length within a compact footprint for channel wavelength demultiplexing.22^–26 This architecture ensures efficient channel demultiplexing while maintaining high-speed performance. Furthermore, we develop a feedback-based thermal stabilization algorithm that dynamically aligns resonant wavelengths across multiple channels, effectively compensating for spectral shifts induced by temperature fluctuations and process variations. To overcome the long locking latency and limited robustness of sequential control in cascaded MRM arrays, this work proposes a fully parallel wavelength stabilization scheme based on an equal-spaced multi-channel MRM transceiver design. A unified thermo-optic feedback architecture is implemented at both the transmitter and receiver, enabling cooperative link-level wavelength alignment without pre-calibration. Benefiting from the polarization-insensitive PSGC-based photodetector at the receiver, the full dense wavelength-division multiplexing (DWDM) link maintains stable performance independent of input polarization state. An eight-channel 200-Gbps per-channel transceiver prototype is demonstrated, as shown in Fig. 1, achieving a ∼30× reduction in locking time and low thermal power overhead. These results verify the practicality of the proposed solution for high-density co-packaged optical interconnects in data-center environments.

The remainder of this paper is organized as follows: Sec. 2 describes the physical modeling and co-design of the high-speed MRM. Section 3 details the design of the bidirectionally incident photodetector and other key components within the receiver system. Section 4 presents the multi-channel transceiver architecture and the wavelength stabilization algorithm, followed by a comprehensive discussion on the performance of the 1.6-Tbps silicon photonic link. Finally, Sec. 5 concludes the paper and discusses the future perspectives of high-density optical I/O.

To meet the stringent bandwidth-density and power-efficiency requirements of chip-scale optical interconnects, we design and demonstrate an eight-channel DWDM transmitter based on silicon photonic MRMs, as illustrated in Fig. 2(a).

The core optical engine integrates eight MRMs fabricated in a standard 220-nm silicon photonics process, as shown in Fig. 2(b). Each ring comprises a 6-μm radius and a 1-μm coupling length, separated by a 180-nm gap from the 380-nm-wide bus waveguide. This radius of ring is yielding an ∼11-nm free spectral range (FSR) that fully accommodates eight 200-GHz-spaced WDM channels across the O-band. This design provides sufficient wavelength margin and relaxed fabrication tolerance for dense WDM integration.

To simultaneously achieve high modulation efficiency and high-speed electro-optic response within the limited footprint, a comprehensive equivalent circuit model was developed, as shown in Fig. 3. The model is fully compatible with standard electronic design automation tools and unifies the description of electrical parasitics, electro-optic dynamics, and thermo-optic nonlinearities, thereby providing quantitative guidance for the MRM structural design.

In the electrical domain, the model describes the positive-negative (PN) junction and its parasitic components using a lumped-element network, including the pad capacitance Cpad, junction capacitance Cj, junction resistance Rs (Rs=Rn+Rp), and a parallel RC network Rsi and Csi[Rsi,Csi=CnCp/(Cn+Cp)] representing substrate leakage. Model analysis identifies Cj and Rs as the primary contributors to the RC-limited bandwidth, highlighting the need for resistance reduction without significantly increasing optical loss.

Guided by preliminary modeling insight that the MRM bandwidth is strongly limited by the RC time constant, we adopt a four-level graded doping scheme composed of dual n-type and dual p-type concentrations (n: 1.0×1020/1.0×1019cm−3; p: 7.1×1019/5.3×1018cm−3). This graded-doping scheme effectively reduces Rs without severely increasing the depletion capacitance Cj while keeping the highly doped regions away from the optical mode, thereby mitigating free-carrier absorption (FCA) and preserving a sufficiently high Q-factor. This non-uniform distribution enables the spatial decoupling of the device’s resistive and capacitive constraints. By establishing a doping gradient, we optimize the internal electric field profile to ensure that the plasma dispersion effect predominantly interacts with the peak intensity of the optical mode. This maximizes the effective mode-carrier overlap, thereby maintaining strong modulation efficiency while minimizing optical loss.

The optimized structure predicted by the equivalent circuit model is experimentally validated through S11 characterization. As shown in Figs. 4(a) and 4(b), fitting the measured response yields an RC-limited bandwidth of 167 GHz under −3-V bias, in close agreement with model predictions. This confirms that the graded doping scheme effectively alleviates the resistive–capacitive bottleneck, leading to a significant enhancement in high-speed electrical performance.

In the optical domain, the model employs time-domain coupled-mode theory to map the resonant cavity dynamics to an equivalent RLC circuit, describing the temporal evolution of the intra-cavity energy a(t) driven by the input field Ei(t) and producing the output field Eo(t) by da(t)dt=(jω0−1τ)a(t)−jμEi(t),(1)Eo(t)=Ei(t)−jμa(t),(2)where ω0 is employed to characterize the intrinsic angular frequency, and τ describes the decay time constant, which is influenced by the dynamics of the MRM during modulation. The overall decay time constant is described by 1τ=1τl+1τe,(3)where τl describes the intrinsic photon lifetime, and τe is employed to characterize the coupling lifetime. As shown in Fig. 3, the decay of optical energy within the ring, governed by τl and τe, is represented by L, R2 (L/R2=τl/2) and C, R1 (R1C=τe/2), respectively. The voltage-dependent plasma dispersion effect across Cj is represented by a voltage-controlled current source, forming the coupling bridge between the electrical and optical domains. In addition, a thermo-optic module is incorporated, where a self-heating coefficient R characterizes resonance redshift and spectral asymmetry caused by two-photon absorption and FCA: Δλres=λresngRΔa(t),(4)where λres denotes the resonant wavelength, Δλres signifies the change in the resonant wavelength, ng represents the group index, and Δa(t) signifies the change in the intra-cavity energy. This allows the model to reproduce the static transmission response and accurately predict resonance redshift and spectral distortion under high optical power, thereby guiding the design of the thermal tuning mechanism: g=4πcλresneffR1∂ng∂VDD2+1/τ2,where the detuning parameter D is denoted as D=2πc|1λ−1λres+Δλres|, and g is a function of the refractive index neff, accounting for both bias voltage fluctuations and self-heating effects simultaneously.

To improve the electrical bandwidth, a heavily doped scheme was adopted, which inevitably deteriorates the optical coupling condition. Analysis of the τl and τe within the model indicates that a higher τe is required to compensate for this degradation and maintain sufficient modulation depth. To address this trade-off, a racetrack-shaped resonator was employed to mitigate the weakened coupling caused by heavy doping. The elongated straight coupling section enhances mode overlap between the ring and bus waveguides, enabling high modulation depth and extinction ratio (ER) even with a relatively low Q factor.

Optical characterization further validates the accuracy of the model and the co-optimized device structure. As shown in Fig. 4(c), static transmission spectra were used to extract the intrinsic and coupling lifetimes, both of which show excellent agreement with the design predictions. The MRM achieves a modulation efficiency of 36pm/V and an ER>18dB while maintaining a moderate Q factor of ∼2700 and an FSR of ∼11nm, as shown in Figs. 5(a) and 5(b), confirming that the electrical–optical trade-off is effectively balanced. In addition, each MRM incorporates a titanium nitride (TiN) microheater to compensate for wavelength deviations. The measured resonance shifts under varying optical input powers [Fig. 4(d)] enable accurate calibration of the thermo-optic parameters, laying a robust foundation for subsequent wavelength locking and thermal–crosstalk mitigation.

Figure 6(a) shows a microscope image of the fabricated eight-channel MRMs array, illustrating the integrated layout used in the DWDM transmitter. The transmitter adopts a single-bus architecture, enabling eight MRMs to share a common input/output waveguide within an extremely compact footprint of only 3.25mm×0.2mm when accounting for the chip pad area. When accounting for the edge couplers (or grating couplers) used for the MRM array, the total footprint of the transmitter remains exceptionally compact, measuring only 5mm×0.2mm. Parallel operation with 200-GHz channel spacing is demonstrated in Fig. 6(b). As shown in Fig. 6(c), each MRM exhibits a 74-GHz 3-dB electro-optic bandwidth under −3-V bias voltage, which provides sufficient bandwidth margin to support 200-Gbps per-channel PAM4 transmission. As shown in Fig. 7, all eight channels exhibit clear and symmetric eye diagrams under 200-Gbps PAM4 modulation. The measured transmitter and dispersion eye closure for PAM4 (TDECQ) values are below 3 dB across all channels, confirming robust signal quality. With eight parallel channels, the transmitter achieves an aggregate data rate of 1.6 Tbps.

In summary, the proposed equivalent circuit model and co-design strategy establish a closed-loop design methodology that tightly links modeling, parameter extraction, and device optimization. This framework substantially improves both the modulation speed and integration density of silicon MRMs and provides a reusable design paradigm for next-generation high-bandwidth-density optical interconnects and optical I/O systems.

Figure 8 illustrates the overall architecture of the proposed eight-channel polarization-insensitive receiver. The receiver comprises eight bidirectionally incident PDs, a PSGC, and eight dual-ring filters with a channel spacing of 200 GHz. In this design, the incident optical signal is first coupled into the chip through the PSGC, which converts arbitrary input polarization states into two transverse-electric (TE) modes. The dual-ring filter then performs wavelength demultiplexing, routing each wavelength channel to its corresponding photodetector. Metal micro-heaters are integrated above each microring resonator to enable fine-tuning of the filter’s spectral response.

To ensure that the two optical paths in each channel are simultaneously detected by the PD, optical delay lines are incorporated upstream of the PDs to achieve precise path-length matching. In addition, TiN micro-heaters are integrated above the dual-ring filters to enable fine spectral tuning, compensating for fabrication-induced variations and enhancing overall system stability. Based on this architecture, eye diagram measurements were conducted, confirming an aggregate data rate of 8×200Gbps. The following sections provide an in-depth discussion of the three key components of the receiver: the bidirectionally incident PD, the PSGC, and the dual-ring filter.

In optical receiver systems, the PD serves as the pivotal component that enables optical-to-electrical conversion. To meet the stringent requirements of CPO and optical I/O applications for high data rates and high sensitivity, we designed a high-speed, waveguide-integrated, bidirectionally incident SiGe PIN PD based on the principle of evanescent-field coupling. The device achieves an effective trade-off between responsivity and bandwidth, and its three-dimensional structural schematic is shown in Fig. 9(a). The PD was fabricated on the SOI platform; the Ge absorber is 20μm long, 0.5μm wide, and 0.26μm thick, whereas the Si waveguide thickness is 0.22μm.

To achieve high responsivity within a relatively short Ge absorption region, the PD incorporates a bidirectional incidence scheme. Physically, this architecture allows the optical signal to be coupled into the Ge absorber from both directions simultaneously, effectively doubling the interaction length between the optical field and the absorption medium. By maximizing the photocarrier generation within a compact footprint, this design overcomes the traditional trade-off between responsivity and bandwidth, ensuring high-speed 200-Gbps performance without compromising signal sensitivity. However, such a bidirectional configuration may introduce an optical path difference among the counter-propagating waves. To address this, optical delay lines were precisely engineered to achieve accurate optical-path matching, ensuring the synchronous arrival of the two beams at the absorber and preserving the temporal integrity of the high-speed PAM4 signals. Furthermore, the bidirectional coupling scheme promotes a more uniform electric-field distribution within the Ge layer. This physically enhances the carrier collection efficiency and mitigates local saturation effects, thereby further bolstering the overall responsivity and linearity of the device.

After completing the optical design, the doping profile of the device was further optimized. The PD employs a lateral PIN configuration,27^–29 in which heavily doped regions are introduced near the ohmic contacts to reduce the series resistance, whereas a 0.4-μm-wide intrinsic region is inserted between the p-type and n-type areas to minimize the junction capacitance. This design achieves an effective balance between low series resistance and high bandwidth performance.

As shown in Fig. 9(b), the fabricated device exhibits an exceptionally low dark current of only 9.1 nA at a bias voltage of −2V. Under a −2-V bias voltage and an input optical power of −6dBm, the internal responsivity reaches as high as 0.81A/W. The bandwidth measurement results of the receiver are presented in Fig. 9(c). With an input optical power of −6dBm, the PD exhibits a 3-dB optoelectrical (OE) bandwidth of 30 GHz at 0-V bias voltage. The relatively low bandwidth under this condition is primarily attributed to the limited internal electric field, where carrier transport is dominated by diffusion, thereby constraining the high-frequency response of the device. When the reverse bias is increased to the operating voltage of −2V, the electric field becomes sufficiently strong to drive carriers at their saturation drift velocity, resulting in a bandwidth enhancement to 59 GHz. These results clearly demonstrate the outstanding high-speed performance of the proposed PD for optical receiver applications.

In standard SiPh platforms, waveguides typically support only the TE mode, whereas the polarization state of light in optical fibers is inherently random. This polarization mismatch introduces significant PDL, posing a major challenge for achieving robust optical receivers. Grating couplers (GCs) are widely adopted due to their low insertion loss and compatibility with wafer-level testing.30^–32 Although conventional one-dimensional GCs can achieve insertion losses as low as −0.9dB, they are highly polarization-sensitive, effectively coupling only TE or TM modes.

In this study, a two-dimensional PSGC was employed as the on-chip coupling scheme, with its structural schematic shown in Fig. 10(a). The PSGC enables arbitrary input polarization states to be coupled and separated into two independent TE-mode signals propagating in single-mode waveguides. Its design requires a careful trade-off among coupling efficiency, optical bandwidth, and PDL.33^–36 Here, we adopted a PSGC structure previously developed by our group, which integrates an asymmetric gradually varying etch pattern with a small-angle tilted incidence.17 This configuration suppresses second-order scattering while enhancing the overlap between the optical field and fiber mode, thereby simultaneously improving both PDL performance and coupling efficiency. The measured performance of the PSGC is shown in Fig. 10(b): with an 8-deg tilt angle of incidence, the insertion loss at the peak wavelength is ∼5.25dB, and the 1-dB optical bandwidth exceeds 30 nm. Meanwhile, within a 30-nm wavelength range, the PDL remains below 0.32 dB.

In DWDM systems, demultiplexing filters play a critical role at the receiver by separating optical signals of different wavelength channels. Microring resonators (MRRs) have been widely investigated due to their compact footprint and excellent filtering characteristics. However, conventional single-ring filters typically suffer from narrow bandwidth (with a 3-dB bandwidth of only ∼64.7GHz), slow roll-off, and high sensitivity to fabrication tolerances and temperature fluctuations.37^,38 In contrast, dual-ring filters can provide a wider and flatter passband, enhancing tolerance to process variations and thermal effects.39^,40

In the proposed receiver architecture, multi-channel wavelength demultiplexing is realized using cascaded dual-ring filters, as shown in Fig. 11(a). To achieve a wide and flat passband, the coupling coefficients between the bus waveguide and the upper/lower rings are set to κ=0.15, and the inter-ring coupling coefficient is set to 0.02. Each MRR integrates a TiN thin-film micro-heater, enabling independent thermal tuning of the resonant wavelengths of the two rings, thereby allowing precise control of the filter’s central wavelength and spectral response.

In summary, this work presents a compact wavelength-demultiplexing architecture based on cascaded dual-ring resonators. As shown in Fig. 11(b), by producing a wide and flat passband (81-GHz 1-dB bandwidth) and integrating thermo-optic tuning elements, the proposed design significantly enhances the demultiplexing system’s tolerance to fabrication imperfections and environmental variations.

In this work, the receiver employs an eight-channel DWDM architecture based on polarization splitting, and a microscopic image of the fabricated chip is shown in Fig. 12(a). The receiver exhibits a high degree of integration and a compact footprint of only 3mm×0.4mm, targeting high-performance applications such as high-speed optical interconnects and CPO. The overall system comprises three principal functional blocks: (1) a PSGC capable of efficiently converting arbitrarily polarized incident light into the TE mode, (2) cascaded dual-ring demultiplexing filters that enable precise wavelength discrimination and routing for all DWDM channels, and (3) high-speed, bidirectionally incident SiGe PDs that provide broadband and efficient optical-to-electrical conversion. By integrating these three components on a single photonic platform, the proposed DWDM receiver simultaneously achieves polarization-independent fiber-to-chip coupling, fine-resolution wavelength filtering, and high-bandwidth photodetection, thereby establishing a compact and high-performance solution for advanced optical-receiver architectures.

After individual characterization of the constituent devices, the receiver measurement was conducted. The eye diagram test setup is illustrated in Fig. 12(b): an O-band tunable narrow-linewidth laser serves as the optical source, and the output carrier is passed through a polarization controller into a 67-GHz thin-film lithium niobate modulator. The radio frequency (RF) signal, generated by a Keysight M8194A arbitrary waveform generator (AWG) and amplified via an RF amplifier, drives the modulator. The modulated optical signal is then coupled into the receiver via the PSGC. The receiver is powered through a Bias-Tee, and the extracted electrical signals are monitored with a high-speed RF probe connected to an oscilloscope for eye diagram analysis. Figure 12(c) shows the eye diagram of a single 200-Gbps PAM4 channel. All eight channels exhibit clear and well-opened eyes, with TDECQ values ranging from 3.11 to 3.32, demonstrating excellent uniformity across channels.

Stable control of MRM arrays remains a major challenge for practical deployment. A typical single-MRM control algorithm consists of two phases: (1) Initial resonance search: the heater voltage is swept to move the resonant wavelength across one FSR while continuously monitoring the photocurrent. The photocurrent peak is used to determine a coarse bias point. (2) Steady-state fine tracking: in the vicinity of this bias point, small photocurrent variations are periodically detected, and the heater voltage is finely tuned to maintain the optimal modulation state. Therefore, the first phase demands high thermal efficiency and a sufficient tuning range, whereas the second phase relies on high-precision analog-to-digital converter (ADC) sampling and fast feedback response. A proper trade-off must be achieved in the system design.

In the chip layout, the MRMs are arranged sequentially along the bus waveguide from shorter to longer resonant wavelengths. During operation, all resonators are initially designed with resonance wavelengths located on the short-wavelength side of their target laser tones, ensuring that fabrication-induced variations do not shift any devices to the long-wavelength side at startup. The wavelength-locking procedure is outlined in Fig. 13. An identical initial thermal bias is then applied to all MRMs to enable fully parallel resonance scanning. When the intra-ring photocurrent of a particular MRM reaches the maximum value for its assigned channel, its resonance is considered aligned with one of the DWDM wavelengths, and the heating for that device is suspended.

At this stage, however, the remaining MRMs located further on the short-wavelength side have not yet reached their corresponding channels and thus continue to heat and red-shift. As these unaligned resonators approach their target wavelengths, their upstream positions allow them to couple a larger fraction of the bus optical power, thereby reducing the optical power delivered to the MRMs that have already paused heating. Due to this power redistribution, previously aligned MRMs may re-enter the scanning process and continue red-shifting until they reach the correct, longer-wavelength channels.

Through this synergistic mechanism of optical power redistribution and thermal tuning, all MRMs eventually converge to their designated DWDM wavelengths in order from short to long, at which point the total photocurrent reaches its global maximum. After the global alignment is completed, the heater voltages of each MRM are independently fine-tuned based on their intra-ring photocurrent levels to lock the operating point on the left slope of the resonance corresponding to the maximum optical modulation depth, achieving full parallel stabilization of the eight-channel DWDM system.

On the receiver side, the photocurrent extracted from the PD is similarly used as the feedback reference to search for the maximum total photocurrent, enabling wavelength locking in the same manner as at the transmitter. This provides link-level cooperative wavelength alignment, ensuring that the transmitter’s modulation peak and the receiver’s filtering passband are simultaneously matched to the target DWDM channels.

As shown in Fig. 13, the photocurrent from both TX and RX passes through a TIA and a 12-bit ADC, whereas real-time logic judgment is performed by an FPGA. The control signals are then fed to TiN heaters through a 14-bit DAC. Deep trench isolation is employed around the heaters to improve thermal efficiency and reduce thermal crosstalk. The heater has a resistance of 170 Ω and supports a maximum drive voltage of 3.7 V, corresponding to a maximum tuning power of 80.5 mW and a wavelength-shift efficiency of 142pm/mW. Although the DAC offers a minimum voltage resolution of 0.45 mV, the corresponding increment in heating power is nonuniform across the tuning range due to the quadratic relationship between voltage and thermal power. Near the initial operating point 0 V, a 0.45-mV change introduces only ∼1.19nW of additional heating power, leading to an extremely small wavelength shift of ∼0.17fm. At the maximum operating point of 3.7 V, the same voltage step produces up to 19.6μW of power variation, corresponding to a wavelength shift of ∼2.74pm. Nevertheless, this wavelength perturbation remains very small, enabling highly stable operating-point control across the entire heater voltage range.

Figure 14(a) illustrates the spectral evolution of the eight-channel MRMs array during the proposed parallel thermal-tuning procedure. Initially, all resonators are located on the short-wavelength side and remain detuned from their target laser wavelengths. As heating begins, a subset of MRMs first reaches an intermediate state where their resonances align with the nearest laser tones. With continued heating, dynamic optical power redistribution along the bus waveguide causes the upstream MRMs—still on the short-wavelength side—to red-shift further and gradually align with their assigned channels. After all resonators have converged to the correct wavelengths, a unified fine-tuning step adjusts each heater bias to lock the operating point at the maximum optical modulation amplitude (OMA) condition, completing the fully parallel stabilization process.

Figures 14(b) and 14(c) compare the locking performance of the traditional sequential approach and the proposed parallel method. The new method reduces the locking time to ∼1/30 of that of the sequential approach while simultaneously lowering the locking power to ∼1/4, demonstrating its high speed and efficiency. As shown in Fig. 14(d), the receiver side can also achieve a stable thermal-locking state by applying the same tuning method used at the transmitter, enabling reliable link-level wavelength alignment. In practical deployment, smaller fabrication deviations allow the resonant wavelengths to be closer to the laser wavelengths at the operating temperature, further reducing the required thermal power. The maximum thermal tuning energy achieved in this work is 714fJ/bit (assuming the maximum heater voltage of 3.7 V and including both transmitter and receiver contributions). Under a more typical fabrication condition with an initial resonance offset of 2 nm, the total thermal power required for the transceiver reduces to only 130fJ/bit.

To evaluate the overall system performance of this eight-channel WDM optical transceiver, we built a high-speed test platform [as shown in Fig. 15(a)] and conducted comprehensive dynamic performance characterization. The core of the test system includes an AWG, an RF amplifier, and a tunable laser.

First, we validated the basic performance of the transceiver module under the non-return-to-zero (NRZ) modulation format. As shown in Fig. 15(b), when all eight channels operated simultaneously under a 100-Gbps NRZ signal drive, all channels produced clear and wide-open eye diagrams with an ER better than 5 dB, demonstrating excellent multi-channel parallel processing capability.

To further increase the per-channel data rate, we employed the PAM4 modulation format. Driven by a 200-Gbps PAM4 signal, the eight channels likewise exhibited excellent performance consistency. Figure 15(c) shows the eye diagrams for the eight channels, where the four distinct voltage levels are well-defined, and inter-symbol interference is effectively controlled. This confirms the system’s operational potential and stability at extremely high data rates.

Last, Table 1 presents a comparative summary of this work and other state-of-the-art photonic transceivers. Compared with existing literature, our work demonstrates a significant competitive edge in both integration density and performance. Specifically, this work achieves a high channel bit rate of 8×200Gbps under a nine-tap feed-forward equalizer (FFE) without digital signal processing (DSP), matching the top-tier performance reported in recent years but with a significantly more compact footprint. The transmitter (TX) and receiver (RX) areas are only 5mm×0.2mm and 3mm×0.4mm, respectively, which is substantially smaller than other designs in Table 1. The compact footprint of our design is primarily attributed to several architectural innovations. First, instead of using bulky MZM or electro-absorption modulated lasers (EMLs), we utilize MRMs, which are inherently more compact. Furthermore, these MRMs also function as the multiplexer (MUX), further streamlining the transmitter architecture and significantly reducing the chip area. The adopted single-bus transmission scheme also offers a distinct advantage in terms of trace density compared with multi-bus alternatives. On the receiver side, we employ double-ring filters as the DeMUX solution, which occupies a much smaller footprint than traditional multimode interference coupler (MMI) or AWG-based schemes. These optimizations allow our transceiver to achieve high-density integration while maintaining superior performance. Furthermore, unlike most designs of optical transceivers that are polarization-sensitive, our design supports polarization-insensitive operation, enhancing its robustness for practical optical communication systems.

By synergistically combining a compact footprint, high transmission capacity, and polarization-insensitive operation, our proposed architecture offers a highly scalable and robust solution for next-generation high-density optical interconnects. This comprehensive evaluation underscores that the reported results are not only authentic but also represent a significant advancement over current state-of-the-art technologies.

This study presents a fully integrated eight-channel WDM SiPh transceiver system for high-bandwidth-density optical interconnects. At the device level, the transmitter employs a single-bus architecture with MRMs optimized based on an equivalent circuit model, incorporating a graded doping scheme to effectively decouple the intrinsic RC-limit and enhance modulation bandwidth. The receiver adopts a polarization diversity architecture based on cascaded dual-ring filters and integrates a bidirectionally incident photodetector. This design significantly boosts responsivity by doubling the optical interaction length within a compact absorption volume, successfully overcoming the intrinsic responsivity-bandwidth trade-off while maintaining stable performance under arbitrary input polarization. To maintain stable transceiver operation, we adopt an intelligent thermal tuning scheme, reducing the wavelength locking time by ∼30× with a fine tracking accuracy of 2.74 pm. Through this synergistic co-design, this work successfully validates a co-designed, high-performance, and thermally stable SiPh transceiver system, which achieves an aggregate data rate of 1.6 Tbps through eight DWDM channels operating at 200 Gbps each in only a 2.2mm2 total chip area. This achievement marks a significant milestone toward the practical implementation of Tbps-scale SiPh I/O solutions for next-generation CPO and high-performance computing systems.

Acknowledgment. This work was supported by the National Key Research and Development Program of China (Grant No. 2022YFB2803100).

Shenlei Bao received his BS degree from Xidian University, Xi’an, China, in 2021. He is currently focusing on a PhD at the Xi’an Institute of Optical and Precision Machinery, Chinese Academy of Sciences, Xi’an, China. His research focuses on photonic device modeling and silicon photonic interconnects.

Chao Cheng received his BE degree from Xi’an University of Posts and Telecommunications, Xi’an, China, in 2022. He is currently working toward a PhD with the Xi’an Institute of Optical and Precision Machinery, Chinese Academy of Sciences, Xi’an, China. His research interests include design optimization of high bandwidth photodetectors and silicon photonics receivers.

Xianglin Bu received his BS degree from North University of China, Taiyuan, China, in 2023. He is currently working toward a PhD with the Xi’an Institute of Optical and Precision Machinery, Chinese Academy of Sciences, Xi’an, China. His research focuses on multi-wavelength lasers and silicon photonic transmitters.

Houyou Lai received his BE degree from Nanjing University of Posts and Telecommunications, Nanjing, China, in 2024. He is currently working toward an MS degree with the Xi’an Institute of Optical and Precision Machinery, Chinese Academy of Sciences, Xi’an, China. His research interests include high-speed micro-ring modulators and silicon photonics transmitters.

Xishan Yu obtained her Bachelor of Engineering degree from China University of Petroleum (East China) in 2024. Currently, she is pursuing her master’s degree at the Xi’an Institute of Optical and Precision Machinery, Chinese Academy of Sciences, Xi’an, China. Her research interests include design optimization of high-bandwidth silicon-germanium photodetectors.

Jianjun Zhou received his BE degree from Northwest University, Xi’an, China, in 2024. He is currently working toward a PhD with the Xi’an Institute of Optical and Precision Machinery, Chinese Academy of Sciences, Xi’an, China. His research interests include inverse design of multifunctional, low-loss devices, and system design.

Jintao Xue received his BS degree from Harbin Institute of Technology, Weihai, China, in 2020, and subsequently obtained his PhD from the Xi’an Institute of Optics and Precision Mechanics, Chinese Academy of Sciences (CAS), Xi’an, China. He co-founded Lingxi Photonix Technology Co., Ltd. His research focuses on co-packaged silicon photonic engines.

Wenfu Zhang received his PhD in optical engineering from University of Chinese Academy of Sciences (UCAS) in 2011. He is a professor and deputy director of SKLTOP at XIOPM, China, and a professor at the School of Future Technology, UCAS. From 2009 to 2011, he visited McMaster University in Canada. His research interests include integrated photonics, nonlinear optics, micro/nano photonics, planar waveguides, Kerr combs, silicon photonics, and metasurfaces.

Binhao Wang (member, IEEE) received his BS and MS degrees from Zhejiang University in 2008 and 2011, respectively, and his PhD in electrical engineering from Texas A&M University in 2016. From 2016 to 2020, he was a research scientist at Hewlett Packard Labs. He is currently a professor at the State Key Laboratory of Ultrafast Optical Science and Technology, XIOPM, Chinese Academy of Sciences. His research interests include high-speed optical interconnects and silicon photonics.